Conventional Field Programmable Gate Arrays (FPGAs) require a relatively large amount of area on a semiconductor device. This is due largely to the significant number of configuration bits used to define internal logic functions for each element. In addition, conventional FPGAs, particularly Complementary Metal Oxide Semiconductor (CMOS) devices, are difficult to use in fault-tolerant situations because subatomic particles striking a configuration bit cell may alter the functionality of the circuit.
Furthermore, in some embodiments, the FPGA configuration bits may be of a volatile nature requiring additional external memory for holding the configuration information, additional circuitry for configuring the FPGA, and set-up time to load the configuration after power is applied.
Other embodiments may solve the configuration problem with programmable fuse based configuration bits. However, these embodiments may only be programmed once and are, therefore, not reconfigurable. Still other embodiments may use non-volatile memory such as Flash memory or electrically erasable programmable memory as configuration bits. However, these embodiments may not be fault-tolerant and generally have a larger cell size for the configuration bits. The fault tolerance problem has been addressed to some extent by proposals for upset hardened memory designs. However, these memory cells may be larger, require special process steps, or combinations thereof.
Furthermore, semiconductor device fabrication is becoming increasingly complex and difficult as attempts are made to reduce device size to the nanometer technology range. A new fabrication and device formation plan involving relatively loose tolerances and self-assembly of sub-elements may be required to fully achieve the goal of useable electronic circuits incorporating nanometer-scale devices.
Recent research and development in the fields of nanoelectronics and molecular electronics has included several reports of molecular electronic devices comprised of two electrodes with a molecular compound disposed between the two electrodes. These reported devices have the characteristics of non-volatile configurable switches, wherein a bias may be applied to the molecular electronic device in such a manner as to cause the device to appear substantially like an open switch (i.e. a very high resistance) or substantially like a closed switch (i.e. a very low resistance).
There is a need for a reconfigurable FPGA type logic device that can be adapted for fault tolerance and manufactured at a nanometer scale as well as a conventional micron scale.